The present specification relates generally to the field of integrated circuits and to methods of manufacturing integrated circuits (ICs). More particularly, the present specification relates to a system for and a method of forming local interconnects using microcontact printing.
The semiconductor industry desires to manufacture integrated circuits (ICs) with higher and higher densities of devices on a smaller chip area to achieve greater functionality and to reduce manufacturing costs. This desire for large-scale integration has led to a continued shrinking of the circuit dimensions and features of the devices.
The ability to reduce the size of structures such as shorter gate lengths in field-effect transistors is driven by lithographic technology which is, in turn, dependent upon the wavelength of light used to expose the photoresist. In current commercial fabrication processes, optical devices expose the photoresist using light having a wavelength of 248 nm (nanometers). Research and development laboratories are experimenting with the 193 nm wavelength to reduce the size of structures. Further, advanced lithographic technologies are being developed that utilize radiation having a wavelength of 157 nm and even shorter wavelengths, such as those used in Extreme Ultra-Violet (EUV) lithography (e.g., 13 nm).
One challenge facing lithographic technology is fabricating features below 100 nm. Although photolithography is the most widely used technology in IC fabrication, other fabrication technologies are being explored. One such technology is xe2x80x9csoft lithographyxe2x80x9d, which is a non-photolithographic strategy based on such techniques as self-assembly, replica molding, and stamping. Examples are provided in U.S. Pat. Nos. 5,512,131 (Kumar et al.), 5,900,160 (Whitesides et al.), and 6,060,121 (Hidber et al.), and also in Xia, Y. and Whitesides, G., xe2x80x9cSoft Lithographyxe2x80x9d, Annu. Rev. Mater. Sci. 1998, 28:153-84.
As explained by Xia and Whitesides, soft lithography utilizes an elastomeric block or stamp with patterned relief structures on its surface. The elastomeric block is cast molded, coated with a self-assembled monolayer (SAM), then printed onto a suitable medium, such as Au or Agxe2x80x94a thin monolayer of material having a desired chemical property results. Soft lithography has been proposed for such applications as microcontact printing of SAMs, patterned SAMs as resists in selective wet etching, patterned SAMs as templates in selective deposition, micromolding, and related techniques.
One area of lithography which requires further development is the area of local interconnects. Certain integrated circuits (ICs) and IC fabrication processes utilize local interconnects to electrically couple transistor elements. Local interconnects can connect a drain, source, or gate of one transistor to a drain, source, or gate of another transistor. Additionally, local interconnects can connect the drain, source, or gate of one transistor to the drain, source, or gate of the same transistor or to other circuits or conductors within the IC. Generally, conventional local interconnects are formed below a first aluminum (Al) or metal layer associated with an IC (e.g., at the same level or below the top surface of a first thick insulating layer over the semiconductor substrate).
Local interconnects can be created in a trench etch and fill process before the first metal layer is provided over the first thick insulating layer. Local interconnects are generally formed after transistors are formed on the semiconductor substrate and covered by the first thick insulating layer. The thick insulating layer is etched to form trenches which connect the various circuit and transistor elements in accordance with the particular design of the IC. The trenches are filled with a conductive material, such as, polysilicon, tungsten, or other metal to complete the local interconnect. In this way, connections between transistors, nodes, and other elements can be achieved locally without using the first metal layer. As device sizes continue to decrease, the reduction in local interconnect size has remained an obstacle.
Thus, there is a need for microcontact printing for interconnects. Further, there is a need for narrower interconnects. Yet further, there is a need for a system for and method of forming local interconnects using microcontact printing.
The teachings hereinbelow extend to those embodiments which fall within the scope of the appended claims, regardless of whether they accomplish one or more of the above-mentioned needs.
An exemplary embodiment is related to a method of forming a local interconnect in an integrated circuit using microcontact printing. This method can include applying an active agent to a stamp, stamping the stamp on a portion of an integrated circuit wafer to form an aperture in a layer of material on the integrated circuit wafer, and providing a conductive material in the aperture formed by the stamp. The stamp preferably has a wedge-shaped extrusion with a length corresponding to a length of an interconnect to be formed in the portion of the integrated circuit wafer. The conductive material in the aperture defines the interconnect. In one example, the interconnect can be as narrow as 20 to 50 nanometers (nm).
Another exemplary embodiment is related to a method of fabricating an integrated circuit. This method can include providing a dielectric layer over an integrated circuit wafer, selectively forming a trench in the dielectric layer using an extrusion from a stamp, and filling the trench with a conductive material to form an interconnect.
Another embodiment is related to a system for forming local interconnect using microcontact printing. This system can include a stamp having a wedge-shaped extrusion with a length corresponding to the length of an interconnect to be formed in a portion of an integrated circuit.